ESR 15

Nasir Ashfaq

Project: Low-power Architectures for Reliable VLC in Transportation and Manufacturing

Host: FORD OTOSAN (Turkey)

PhD: Ozyegin University (Turkey)

Supervisor: Dr. E. Kınav

Belonging to the city of Lahore, Pakistan, I obtained my bachelor’s degree in electrical engineering from National University of Science and Technology (NUST), Pakistan, in 2014, and my master’s degree in the same field from Bilkent University, Turkey, in 2018. As part of my MS thesis work, I proposed a novel technique for gate modulation in class-E amplifiers, with demonstrated application on MRI hardware. My work was accepted and presented in ISMRM, France, 2018, and ESMRM, Spain, 2017.

After completing my master’s degree, I joined Center for Advanced Research in Engineering (CARE) Pvt. Ltd., Pakistan, as Senior Design Engineer, and worked in the designated position for two years.  During my tenure at CARE, I worked on several problems related to SDR’s (Software Defined Radio) RF front-end, including configuring the digital RF front-end of the Xilinx Zynq Ultrascale+ ZCU111 RFSoC platform. Additionally, I implemented some of the associated communication algorithm blocks on the FPGA platform using Verilog programming. Hence, my work till now has provided me with a unique experience of both the software and the hardware domains.

Currently, I am working as a Ph.D. researcher at Ford Otosan under the ENLIGHT’EM project. My project details could be found under the “Project” tab of this page.

Apart from work, I am married to my beautiful wife, Fatima Tu Zahra, and have two adorable daughters, Huda, and Umamah Zaynab. In my free time, I read books, take/edit photographs, watch witty/creative seasons, and create online content. I have a YouTube channel and an associated blog where I share useful experiences from my life.

In this project, we will be focusing on implementing novel architectures and front-end designs to enable low power visible light IoT devices for reliable transportation and manufacturing. We will be investigating the hardware architectures and front-end design options, in addition to performing a comprehensive use-case requirement analysis.

The analog front-end and the optics (e.g. lens and concentrators) will be designed and optimized to reduce the power consumption for the use-case at hand. The proposed solutions will be evaluated in terms of achievable performance and complexity trade-offs, backed-up by numerical results. We will implement a proof-of-concept including an experimental verification for the most promising solution.